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Figure 1.
The proposed S/S compensated WPT system utilizing full-wave rectification.
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Figure 2.
Operating states of full-wave rectifier (a) State I. (b) State II.
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Figure 3.
Equivalent circuit of employed full-wave rectifier.
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Figure 4.
Equivalent S/SP resonance circuit.
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Figure 5.
Equivalent impedance angle (degrees) at varying loads and frequencies.
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Figure 6.
Experimental prototype setup.
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Figure 7.
The inverter output waveforms with different loads. (a) RL = 2-Ω. (b) RL = 5-Ω. (c) RL = 8-Ω.
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Figure 8.
VDS and VGS of inverter MOSFETs with different loads. (a) RL = 2-Ω. (b) RL = 5-Ω. (c) RL = 8-Ω.
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Figure 9.
Transient behaviors with step load.
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Figure 10.
System efficiency performance. (a) Overall efficiency with different loads. (b) The overall efficiency at rated load.
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Part Value Part Value f 100 kHz Req 1.5–6.5 Ω Cp 25.3 nF Lp 120 μH Cs 21.1 nF Ls 120 μH M 20 μH Lc 20 μH Table 1.
A parameter combination following the proposed design methodology.
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Part Value Part Value Vin 100 V ω 200π rad/s Cp 25.5 nF Lp 120.8 μH Cs 21.2 nF Ls 119.6 μH M 21.5 μH Lm 21.5 μH Cf 200 μF RL 2–8 Ω Table 2.
System parameters setup.
Figures
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Tables
(2)